Memory coherence - PDFSEARCH.IO - Document Search Engine

Memory coherence
Results: 85

#	Item
61	Fourth Workshop on Scalable Shared Memory Multiprocessors, Chicago, IL, April 1994 Issues in Software Cache Coherence Leonidas I. Kontothanassis and Michael L. Scott Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-03-27 18:54:49 Cache coherency Computer memory Parallel computing Central processing unit Cache coherence CPU cache Shared memory Distributed shared memory Cache Computing Concurrent computing Computer architecture
62	Allocation Policy Analysis for Cache Coherence Protocols for STT-MRAM-based caches A THESIS SUBMITTED TO THE FACULTY OF THE GRADUATE SCHOOL OF THE UNIVERSITY OF MINNESOTA Add to Reading List Source URL: conservancy.umn.edu Language: English - Date: 2014-12-31 03:01:17 Cache coherency Non-volatile memory Magnetoresistive random access memory Spintronics CPU cache MESI protocol Random-access memory Cache coherence Nonvolatile BIOS memory Computer hardware Computing Computer memory
63	TESTING MEMORY CONSISTENCY OF SHARED-MEMORY MULTIPROCESSORS A DISSERTATION SUBMITTED TO THE DEPARTMENT OF ELECTRICAL ENGINEERING Add to Reading List Source URL: xenon.stanford.edu Language: English - Date: 2008-02-26 14:40:30 Concurrent computing Computer architecture Cache coherence Transactional memory Linearizability Consistency model Algorithm Software bug Sequential consistency Computing Transaction processing Concurrency control
64	Formal Analysis of the ACE Specification for Cache Coherent Systems-On-Chip Abderahman KRIOUILE PhD student, STMicroelectronics – Inria Rhône-Alpes – LIG Add to Reading List Source URL: lvl.info.ucl.ac.be Language: English - Date: 2013-10-02 08:13:33 Computer memory Parallel computing Cache coherence Concurrent computing CPU cache Cache Computing Cache coherency Computer hardware
65	Design Tradeoffs for Simplicity and Efficient Verification in the Execution Migration Machine Keun Sup Shim, Mieszko Lis, Myong Hyon Cho, Ilia Lebedev, Srinivas Devadas Massachusetts Institute of Technology, Cambridge, Add to Reading List Source URL: people.csail.mit.edu Language: English - Date: 2013-08-26 16:12:52 Parallel computing Computer memory Central processing unit Computer architecture Microprocessors CPU cache Multi-core processor Cache Memory coherence Computing Concurrent computing Computer hardware
66	The Locality-Aware Adaptive Cache Coherence Protocol George Kurian Omer Khan Srinivas Devadas Add to Reading List Source URL: people.csail.mit.edu Language: English - Date: 2013-04-22 20:43:35 Computer memory Central processing unit CPU cache Computer architecture MESI protocol Acumem SlowSpotter Bus sniffing Cache Computer hardware Computing
67	Lecture 2: Intro and Snooping Protocols • Topics: multi-core cache organizations, programming models, cache coherence (snooping-based) 1 Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2009-08-21 13:22:30 Central processing unit Computer memory Intel Core Computing Computer hardware CPU cache Cache
68	Checking Cache-Coherence Protocols with TLA+ Rajeev Joshi HP Labs, Systems Research Center, Palo Alto, CA. Leslie Lamport Microsoft Research, Mountain View, CA. Add to Reading List Source URL: www.markrtuttle.com Language: English - Date: 2007-04-26 00:00:00 Theoretical computer science Instruction set architectures Computer memory Parallel computing Cache coherency Model checking CPU cache Formal verification Communications protocol Computing Computer architecture Computer hardware
69	Appeared in the IEEE Transactions on Computers, July[removed]Performance Evaluation of the Slotted Ring Multiprocessor Luiz André Barroso and Michel Dubois Department of Electrical Engineering-Systems Add to Reading List Source URL: barroso.org Language: English - Date: 2005-03-07 23:37:47 Parallel computing Scalable Coherent Interface Supercomputers Computer memory Cache coherence CPU cache Cache Linked list Bus sniffing Computing Cache coherency Concurrent computing
70	DESIGN OPTIONS FOR SMALL SCALE SHARED MEMORY MULTIPROCESSORS by Luiz André Barroso Add to Reading List Source URL: barroso.org Language: English - Date: 2007-04-16 15:40:01 Computer memory Cache coherency Central processing unit Non-Uniform Memory Access Multiprocessing Cache coherence Bus sniffing Uniform memory access CPU cache Concurrent computing Computing Parallel computing

UPDATE